Changelog

This page summarizes user-visible changes without internal run logs or diagnostic details.

Current public status

The recommended starting point remains the uniform Cartesian Yee RF/FDTD lane. Non-uniform mesh, distributed execution, Floquet/Bloch, SBP-SAT subgridding, coaxial/advanced ports, and inverse-design extensions are visible in the docs as experimental or under active validation.

Recent main-branch direction

• Public docs now separate the recommended default lane from experimental lanes.
• Current examples are routed through maintained paths such as examples/crossval/05_patch_antenna.py, examples/crossval/11_waveguide_port_wr90.py, examples/nonuniform_patch_demo.py, and examples/inverse_design/multilayer_ar_coating.py.
• S-parameter documentation now emphasizes matching the calculator to the port family: lumped/wire, MSL, waveguide, or experimental coaxial/Floquet workflows.

v1.6 line

• Continued work on non-uniform mesh workflows, distributed execution, and differentiable design loops.
• Added clearer feature-boundary wording so advanced lanes are not presented as the default public path.
• Improved port and observable APIs for selected RF workflows.

v1.5 line

• Expanded public guide structure for examples, API surfaces, and validation/support boundaries.
• Added practical RF examples and clearer routing for patch, waveguide, and microstrip-style workflows.

Older releases

Earlier releases introduced the core JAX FDTD solver, material/geometry helpers, sources, probes, ports, far-field utilities, and inverse-design workflows. See the Git history and package releases for full implementation detail.